SMX®RTO硬实时嵌入式操作系统

smx® is an advanced, hard real time RTOS kernel for embedded systems. It has been toughened by 30 years of use in hundreds of embedded applications. smx supports ARM/Cortex, ARM-M/Cortex-M, ColdFire, Power Architecture, and other processor architectures, and can be used by itself or with other modules of the SMX RTOS.

The primary API is C, but a C++ kernel API is available in smx++

smx reduces development schedule and cost by offering proven code and pre-integration with popular processors and tools. The smxBSP package, which is included with smx, provides processor-specific support for smx and for the application software. smx is shipped with project files and documentation for specific tool suites. Clear manuals help users to understand how to use multitasking in their designs. The smx Protosystem allows a quick start, with good examples. 

smx lowers product cost due to its high performance and small size. High performance allows using less expensive processors and smaller memories. In some cases, it allows using a single processor instead of a dual-processor. In many cases, smx fits into on-chip RAM and flash. This eliminates the need for external memory chips and may allow using processors without processor buses, which reduces pin count and thus cost, even further.

smx helps to improve reliability because it offers proven code, extensive built-in diagnostics, and powerful kernel-aware debugging using smxAware. The smxAware DLL works with several debuggers to provide kernel-aware debugging. It also offers Graphical Analysis Tools, which include, for example, timelines that show when each ISR, LSR, and task ran and what caused it to start and stop running. It shows stack, memory, and other resource usages, as well as a graphical view of memory layout that can be zoomed. This kind of support permits delivering reliable embedded systems on tight schedules.

More easily maintained application code results from the better structure imposed by smx. Applications based upon smx are organized into tasks that behave predictably. This is more appropriate for modern embedded systems than is the customary super loop, which often results in spaghetti code. Embedded systems written with smx are easier to understand, debug, and maintain. The task structure provided by smx makes it easier to add new product features to keep up with competition. 

smx is affordable There are no royalties, and the up-front cost is low. Full source code and 3 months of support are included.

High performance is one of the key features of smx. A unique three-level control structure (ISR/LSR/Task) permits optimum control. ISRs respond to hardware interrupts and reenable them as quickly as possible. LSRs  perform deferred interrupt processing, with interrupts enabled. Less urgent processing is done by tasks. All smx calls operate with interrupts enabled. The smx scheduler disables interrupts only briefly. Because of this structure, smx interrupt latency is extremely low (comparable to that of the processor, itself). In addition, LSRs, which are invoked by ISRs and smx timers, provide much faster switching times than tasks because they do not save context and they do not switch stacks. Finally, the unique smx layered ready queue provides fast and deterministic task switching.

Small size is another key feature of smx. RAM usage has been optimized, as well as code size. By fitting into on-chip SRAM and flash, not only is the cost of external memory avoided, but also performance is greatly increased, thereby allowing a less expensive processor to be used. Support for one-shot tasks that can share stacks, minimizes stack RAM. Control blocks are small to also save RAM. smx code is efficiently written to minimize code footprint.

Advanced Features:   See smx Datasheet and smx Special Features.

Versions Offered:   ARM, Cortex, ColdFire, Power Architecture